Non-volatile memory such as electrically programmable read-only memory (EPROM) and electrically-erasable programmable read-only memory (EEPROM) are extensively used for storing data in computer systems. EPROM and EEPROM comprise a large number of memory cells having electrically isolated gates, referred to as floating gates. Data is stored in the memory cells in the form of charge on the floating gates. Charge is transported to or removed from the floating gates by program and erase operations, respectively.
Another type of non-volatile memory is flash memory. Flash memory is a derivative of EPROM and EEPROM. Although flash memory shares many characteristics with EPROM and EEPROM, the current generation of flash memory differs in that erase operations are done in blocks.
A typical flash memory comprises a memory array which includes a large number of memory cells arranged in row and column fashion. Each of the memory cells include a floating gate field-effect transistor capable of holding a charge. The cells are usually grouped into blocks. Each of the cells within a block can be electrically programmed in a random basis by charging the floating gate. The charge can be removed from the floating gate by a block erase operation. The data in a cell is determined by the presence or absence of the charge in the floating gate.
Flash memories have the potential of replacing hard storage disk drives in computer systems. The advantages would be replacing a complex and delicate mechanical system with a rugged and easily portable small solid-state non-volatile memory system. There is also the possibilities that given their very high potential densities that given more speed of operation particularity in the erase operation that flash memories might be used to replace DRAMs. Flash memories might then have the ability to fill all memory needs in future computer systems.
One flash memory is described in S. Tiwari et al., “Volatile and Non-volatile Memories in Silicon with Nano-Crystal Storage,” Abstr. of IEEE Int. Electron Device Meeting, pp. 521-524 (1995), which uses confined nano-crystal particles in a floating gate memory cell. The individual nano-crystals are not in electrical contact with each other, and therefore cannot share a common charge. As referred to in the art, the memory has a thin gate oxide and uses a tunnel-tunnel process for writing and reading data. A memory designed to use a tunnel-tunnel process typically has a gate oxide thickness of about 15-20 Å which can be degraded over time resulting in a defective memory.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for a fast flash memory having a floating gate memory cell which in which the floating gate has a reduced electron affinity, can share a common charge, or does not use a tunnel-tunnel process.